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Lookup NU author(s): Dr Delong Shang,
Dr Fei Xia,
Professor Alex Yakovlev
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Delay-insensitivity is a theoretically attractive design principle which helps circuits to be resistant to process variations, particularly exhibiting themselves at the system level as delay variations. Unfortunately, delay insensitive (DI) design is impractical for most real systems. Speed independent (SI) design is often used in practice as a next best approach. With the scaling of wires becoming more and more difficult compared with logic gates at current and future technology nodes. SI systems are becoming less acceptable as "approximates" for DI systems. This paper proposes an approach based on decomposing complex systems into simple, manageable blocks which can be safely rendered in an SI manner. These blocks are then connected using interconnects which satisfy DI requirements to obtain "virtual DI" behaviour at system level. We demonstrate this approach with a tile-based implementation of a multi-access arbiter.
Author(s): Shang DL, Xia F, Golubcovs S, Yakovlev A
Editor(s): Monteiro, J; van Leuken, R
Publication type: Conference Proceedings (inc. Abstract)
Publication status: Published
Conference Name: 19th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS 2009)
Year of Conference: 2010
ISSN: 0302-9743 (Print) 1611-3349 (Online)
Library holdings: Search Newcastle University Library for this item
Series Title: Lecture Notes in Computer Science