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Advanced VLSI Validated Input Security Device Employing Data and Hardware Validation Features

Lookup NU author(s): Emeritus Professor Satnam Dlay, Martin McLauchlan

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Abstract

A fast CMOS VLSI device is described to execute the Data Encryption Standard (DES) algorithm. The device is known as the validated input security device (VISD) since it enables transmitted and received data to be validated through the use of parity checking. The device is directly compatible with most microprocessor families and it is also directly compatible with most DMA controllers. Full or partial parallelism can be used between encryption and input/output communication.

Publication metadata

Author(s): Iliev V, Dlay SS, McLauchlan MR et al

Publication type: Article

Publication status: Published

Journal: IEE Proceedings E: Computers and Digital Techniques

Year: 1989

Volume: 136

Issue: 6

Pages: 471-477

Print publication date: 07/04/2010

ISSN (print): 0143-7062

ISSN (electronic): 1751-861X

Publisher: IET

URL: http://dx.doi.org/10.1049/ip-e.1989.0064

DOI: 10.1049/ip-e.1989.0064

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