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Lookup NU author(s): Dr Victor Khomenko
Synthesis of asynchronous circuits from Signal Transition Graphs (STGs) involves resolution of state encoding conflicts by means of refining the STG specification. In this paper, a fully automatic technique for resolving such conflicts by means of insertion of new signals and concurrency reduction is proposed. It is based on conflict cores, i.e. sets of transitions causing encoding conflicts, which are represented at the level of finite and complete unfolding prefixes, and a SAT solver is used to find where in the STG the transitions of new signals should be inserted and to check the validity of concurrency reductions. The experimental results show significant improvements over the state space based approach in terms of runtime and memory consumption, as well as some improvements in the quality of the resulting circuits.
Author(s): Khomenko V
Publication type: Article
Publication status: Published
Journal: IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year: 2009
Volume: 17
Issue: 7
Pages: 855-868
Date deposited: 13/09/2010
ISSN (print): 1063-8210
ISSN (electronic): 1557-9999
Publisher: IEEE
URL: http://dx.doi.org/10.1109/TVLSI.2008.2012156
DOI: 10.1109/TVLSI.2008.2012156
Notes: Special Section on Asynchronous Circuits and Systems
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