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Concurrency Models for Designing Interface Logic in Distributed Systems

Lookup NU author(s): Professor Alex Yakovlev



Asynchronous digital interface circuits exhibit a high degree of concurrency. Self-timed implementation is the most appropriate design discipline for them. We analyse a number of concurrency models with respect to their capacity to describe certain types of self-timed, or delay-design process: abstract synthesis and logic design. They ivolve formal manipulation of both structural representations (discriminators) and behavioural descriptions by labelled petri nets and signal graphs. In a greater detail we examine the signal graphs, which are subject to formal treatment and mechanical translation to delay-insensitive circuits. Two examples of designing logic for interface adaptors effectively illustrate the approach.

Publication metadata

Author(s): Yakovlev A

Publication type: Report

Publication status: Published

Series Title: Computing Laboratory Technical Report Series

Year: 1989

Pages: 16

Print publication date: 01/11/1989

Source Publication Date: November 1989

Report Number: 285

Institution: Computing Laboratory, University of Newcastle upon Tyne

Place Published: Newcastle upon Tyne