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Lookup NU author(s): Dr Victor Khomenko,
Professor Maciej KoutnyORCiD,
Professor Alex Yakovlev
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The behaviour of asynchronous circuits is often described by Signal Transition Graphs (STGs), which are Petri nets whose transitions are interpreted as rising and falling edges of signals. One of the crucial problems in the synthesis of such circuits is that of identifying whether an STG satisfies the Complete State Coding (CSC), Unique State Coding (USC), or normalcy (a necessary condition for their implementability using gates without input invertors) requirements, e.g. by using model checking based on the reachability graph of an STG. In this paper, we avoid constructing the reachability graph of an STG, which can lead to state space explosion, and instead use only the information about causality and structural conflicts between the events involved in a finite and complete prefix of its unfolding. The model checking algorithm is derived by adopting the Boolean Satisfiability (SAT) approach. Following the basic formulation of the state coding conflict relationship, we present some problem-specific optimization rules. This technique leads not only to huge memory savings when compared to the CSC/USC/normalcy violation detection methods based on reachability graphs, but also to significant speedups in many cases.
Author(s): Khomenko V, Koutny M, Yakovlev A
Publication type: Report
Publication status: Published
Series Title: Department of Computing Science Technical Report Series
Print publication date: 01/09/2002
Source Publication Date: September 2002
Report Number: 778
Institution: Department of Computing Science, University of Newcastle upon Tyne
Place Published: Newcastle upon Tyne