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Lookup NU author(s): Raaed Al-Dujaily,
Dr Terrence Mak,
Dr Fei Xia,
Professor Alex Yakovlev
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Complex thermal behavior inhibits the advancement of three-dimensional (3D) very-large-scale-integration (VLSI) system designs, as it could lead to ultra-high temperature hotspots and permanent silicon device damage. This article introduces a new runtime thermal management strategy to effectively diffuse and manage heat throughout 3D chip geometry for a better throughput performance in networks on chip (NoC). This strategy employs a dynamic programming-based runtime thermal management (DPRTM) policy to provide online thermal regulation. Reactive and proactive adaptive schemes are integrated to optimize the routing pathways depending on the critical temperature thresholds and traffic developments. Also, when the critical system thermal limit is violated, an urgent throttling will take place. The proposed DPRTM is rigorously evaluated through cycle-accurate simulations, and results show that the proposed approach outperforms conventional approaches in terms of computational efficiency and thermal stability. For example, the system throughput using the DPRTM approach can be improved by 33% when compared to other adaptive routing strategies for a given thermal constraint. Moreover, the DPRTM implementation presented in this article demonstrates that the hardware overhead is insignificant. This work opens a new avenue for exploring the on-chip adaptability and thermal regulation for future large-scale and 3D many-core integrations.
Author(s): Al-Dujaily R, Dahir N, Mak T, Xia F, Yakovlev A
Publication type: Article
Publication status: Published
Journal: ACM Transactions on Design Automation of Electronic Systems (TODAES)
ISSN (print): 1084-4309
ISSN (electronic): 1557-7309
Publisher: Association for Computing Machinery, Inc
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