Signal graphs: a model for designing concurrent logic

Kondratyev, AYu; Rosenblum, LYa; Yakovlev, AV

Signal graphs: a model for designing concurrent logic

Lookup NU author(s): Professor Alex Yakovlev

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Abstract

Asynchronous digital circuits exhibit a high degree of concurrency. Self-timed implementation is the most appropriate design discipline for them. We examine the signal graphs that are subject to formal treatment and mechanical translation to delay-insensitive circuits. An example of designing a piece of logic for typical interface adapter effectively illustrates the approach and sheds light on future work.