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Lookup NU author(s): Mohammed Al-Daloo,
Professor Alex Yakovlev,
Dr Basel Halak
This is the authors' accepted manuscript of an article that has been published in its final definitive form by IEEE, 2020.
For re-use rights please refer to the publisher's terms and conditions.
As VLSI circuits are progressing in very Deep Submicron (DSM) regime without decreasing chip area, the importance of global interconnects increases but at the cost of performance and power consumption. This work proposes a low power circuit for driving a global interconnect at voltages close to the noise level. In order to address ultra-low power (ULP) design limitations, a novel driver scheme has been configured. This scheme uses a bootstrap circuitry which boosts the driver's ability to drive a long interconnect with an important feedback feature in it. Hence, this approach achieves two objectives: improving performance and mitigating power consumed. Those achievements are essential in designing ULP circuits along with occupying a smaller footprint and being immune to noise, observed in this design as well. These have been verified by comparing the proposed design to the previous and traditional circuits using a simulation tool. Additionally, the boosting based approach has been shown beneficial in mitigating the effects of single-event upsets (SEU), which are known to affect DSM circuits working under low voltages. As a result, the proposed circuit demonstrates a promising solution to address the energy and performance issues related to scaling effects on interconnects along with soft errors that can be caused by neutron particles.
Author(s): Al-Daloo M, Abufalgha MA, Yakovlev A, Halak B
Publication type: Article
Publication status: Published
Journal: IEEE Transactions on Circuits and Systems I: Regular Papers
Print publication date: 01/10/2020
Online publication date: 21/07/2020
Acceptance date: 29/06/2020
Date deposited: 23/07/2020
ISSN (print): 1549-8328
ISSN (electronic): 1558-0806
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