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Asynchronous Design of a Bitwise Elimination Argmax via High-Level Modeling in GraphRack

Lookup NU author(s): Hugh Squires-Parkin, Dr Alex ChanORCiD, Professor Rishad ShafikORCiD, Adrian WheeldonORCiD, Professor Alex YakovlevORCiD

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This work is licensed under a Creative Commons Attribution 4.0 International License (CC BY 4.0).


Abstract

In this paper, we propose a novel approach for designing an asynchronous-based Bitwise Elimination Argmax (BEA) with early completion features catered for event-driven machine learning (ML) applications, and a novel software tool called GraphRack for high-level analysis of distributed, yet parallel, asynchronous designs of graph-based models like Petri nets (PNs). Typically in ML architectures, the Argmax functions to find the largest vector within an input set can be a costly operation and size inefficient, especially for bespoke low-latency ML architectures. By introducing an asynchronous BEA, we address the above with an ‘in the race’ style protocol, where vectors are competed against one another and are procedurally eliminated from the most to least significant bits, with high-confidence classification vectors winning the fastest. This asynchronous BEA component is implemented using PNs and is tested against two benchmark scenarios: randomly distributed vectors and Tsetlin Machine (TM) class sum data. We also introduce GraphRack‘s simulation platform that accelerates the analysis of PN models. Here, our results show average-case performance improvements of 1.52× over worst-case for random vectors, and a 2.06× improvement for TM classifications. With a direct, yet time-independent, design, our findings show BEA’s ability to reduce inference times in more general classification hardware.


Publication metadata

Author(s): Squires-Parkin H, Chan A, Shafik R, Wheeldon A, Yakovlev A

Publication type: Conference Proceedings (inc. Abstract)

Publication status: Published

Conference Name: 29th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)

Year of Conference: 2025

Pages: 89-98

Online publication date: 05/06/2025

Acceptance date: 10/03/2025

Date deposited: 08/06/2025

Publisher: IEEE

URL: https://doi.org/10.1109/ASYNC65240.2025.00021

DOI: 10.1109/ASYNC65240.2025.00021

ePrints DOI: 10.57711/4n2m-4205

Library holdings: Search Newcastle University Library for this item

ISBN: 9798331503109


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