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Synthesis and implementation of a signal-type asynchronous data communication mechanism

Lookup NU author(s): Professor Alex Yakovlev, Dr Fei Xia, Dr Delong Shang


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This paper describes the synthesis and hardware implementation of a signal-type asynchronous data communication mechanism (ACM). Such an ACM can be used in systems where a data-driven ("lazy") logic must be interfaced with a time-driven ("busy") environment. A new classification system for ACMs is introduced. The conceptual definition of the signal ACM (called simply "Signal") is refined using Petri net techniques. Based on this, a more precise, state graph specification of a two-slot signal is then constructed. Using the theory of regions, a Petri net specification of the ACM is synthesized from the state graph. The Petri net model is then translated into a hardware implementation, which is entered into Cadence tools. Simulation results show that the hardware does conform to the definitions and specifications. The techniques employed in this work are potentially useful in the development of an automated process of synthesising similar systems. (20 References).

Publication metadata

Author(s): Yakovlev A, Xia F, Shang D

Publication type: Conference Proceedings (inc. Abstract)

Publication status: Published

Conference Name: 7th International Symposium on Asynchronous Circuits and Systems (ASYNC 2001)

Year of Conference: 2001

Pages: 127-136

ISSN: 9780769510361

Publisher: IEEE Computer Society


DOI: 10.1109/ASYNC.2001.914076

Notes: Los Alamitos, CA, USA. Proceedings Seventh International Symposium on Asynchronous Circuits and Systems. ASYNC 2001. Salt Lake City, UT, USA. IEEE Comput. Soc. Tech. Committee on VLSI. 11-14 March 2001.

Library holdings: Search Newcastle University Library for this item

ISBN: 0769510361