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Designing Control Logic for Counterflow Pipeline Processor Using Petri Nets

Lookup NU author(s): Professor Alex YakovlevORCiD

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Abstract

This paper approaches the problem of synthesising an asynchronous control circuit for a stage of the Sproull Counterflow pipeline processor (CFPP) as an exercise in exploiting formal techniques available for Petri nets. We first synthesise a Petri net model of the CFPP stage control from its original "five-state-five-event" description due to Charles Molnar. Secondly, we implement that model in asynchronous circuits, using two-phase and four-phase components. The latter stage involves synthesising circuits with arbitration elements from behavioural descriptions with internal conflicts. This exercise appears to be quite instructive in the sense that it helps to estimate the scope and power of formal methods and today's automatic tools in assisting the process of asynchronous design.

Publication metadata

Author(s): Yakovlev A

Publication type: Article

Publication status: Published

Journal: Formal Methods in System Design

Year: 1998

Volume: 12

Issue: 1

Pages: 39-71

Print publication date: 01/01/1998

ISSN (print): 0925-9856

ISSN (electronic): 1572-8102

Publisher: Springer

URL: http://dx.doi.org/10.1023/A:1008649930696

DOI: 10.1023/A:1008649930696

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