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Statechart based HW/SW codesign system

Lookup NU author(s): Ian Bates, Dr Graeme Chester, Professor David Kinniment


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The Codesign Finite State Machine (CFSM) formal model provides a suitable approach for the description of hardware/software systems. The POLIS tool from Berkeley implements the CFSM methodology but currently relies on the textually based Esterel specification language as a high level for the description of individual CFSMs. The designer must then use the Ptolemy simulator to interconnect the CFSM network and perform co-simulation. This paper describes work in progress in developing a system which instead aims to use StatemateTM, a statecraft based tool for seamless specification and co-simulation of the entire CFSM network, whilst using the POLLS tool for `C', VHDL code generation and performance estimation. This technique should give the clear advantages of using a graphical specification language together with a uniform co-simulation framework.

Publication metadata

Author(s): Bates ID, Chester EG, Kinniment DJ

Publication type: Conference Proceedings (inc. Abstract)

Publication status: Published

Conference Name: Seventh International Workshop on Hardware/Software Codesign (CODES'99)

Year of Conference: 1999

Pages: 162-166

ISSN: 9781581131321

Publisher: Association for Computing Machinery

Library holdings: Search Newcastle University Library for this item

ISBN: 1581131321