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A new European research project aims to develop a microprocessor based on the logarithmic number system, in which a real number is represented as a fixed-point logarithm. Multiplication and division therefore proceed in minimal time with no rounding error. However, the system can only offer an overall advantage over floating-point if addition and subtraction can be performed with speed and accuracy at least equal to that of floating-point, but these operations require the interpolation of a nonlinear function which has hitherto been either time-consuming or inaccurate. We present a procedure by which additions and subtractions can be performed rapidly and accurately and show that these operations are thereby competitive with their floating-point equivalents. We then present some large-scale case studies which show that the average performance of the LNS exceeds floating-point, in terms of both speed and accuracy. © 2000 IEEE.
Author(s): Coleman JN, Chester EI, Softley CI, Kadlec J
Publication type: Article
Publication status: Published
Journal: IEEE Transactions on Computers
Print publication date: 01/07/2000
ISSN (print): 0018-9340
ISSN (electronic): 1557-9956
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