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Visualisation and resolution of encoding conflicts in asynchronous circuit design

Lookup NU author(s): Agnes Madalinski, Dr Alex Bystrov, Dr Victor Khomenko, Professor Alex Yakovlev



Synthesis of asynchronous circuits from signal transition graphs (STGs) involves resolution of state encoding conflicts by means of refining the STG specification. The refinement process is generally done automatically using heuristics. It often produces suboptimal solutions or sometimes fails to solve the problem. Thus manual intervention by the designer may be required. A framework is presented for an interactive refinement process aimed to help the designer. It is based on the visualisation of conflict cores, i.e. sets of transitions causing encoding conflicts, which are represented at the level of finite and complete prefixes of STG unfoldings.

Publication metadata

Author(s): Madalinski A, Bystrov A, Khomenko V, Yakovlev A

Publication type: Conference Proceedings (inc. Abstract)

Publication status: Published

Conference Name: 6th Conference on Design and Test in Europe (DATE03)

Year of Conference: 2003

Pages: 285-293

ISSN: 1751-8601

Publisher: IEE Proceedings: Computers and Digital Techniques


DOI: 10.1049/ip-cdt:20030831

Library holdings: Search Newcastle University Library for this item

ISBN: 1751861X