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Lookup NU author(s): Dr Delong Shang,
Dr Frank Burns,
Dr Albert Koelmans,
Professor Alex Yakovlev,
Dr Fei Xia
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A technique is proposed to synthesise system behavioural specifications written in VHDL into speed-independent asynchronous circuits constructed using David cells. This technique combines the advantages of logic synthesis and syntax-directed translation techniques. Coloured Petri nets and labelled Petri nets are used as intermediate formats for datapath and control representation. Speed-independent asynchronous circuits are obtained from these nets via direct translation. Several examples demonstrate the viability of the technique, which produces superior results compared with other ones.
Author(s): Shang D, Burns F, Koelmans A, Yakovlev A, Xia F
Publication type: Article
Publication status: Published
Journal: IEE Proceedings - Computers and Digital Techniques
Print publication date: 01/05/2004
ISSN (print): 1350-2387
Publisher: The Institution of Engineering and Technology
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