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Lookup NU author(s): Professor Said Boussakta
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A simple and efficient residue reduction algorithm is presented. This algorithm is suitable for DSP hardware architecture and can be used successfully in small, residue systems to speed up modulo calculation, which tend to be computationally intensive operation. The technique uses a lookup table (LUT) of finite length with circular buffer registers, which makes it quick to implement and naturally fast to perform as it uses hardware rather than software to run. Simulation results are given to prove the validity of this algorithm for small residue systems. © 2007 IEEE.
Author(s): Aziz M, Boussakta S
Publication type: Conference Proceedings (inc. Abstract)
Publication status: Published
Conference Name: 15th International Conference on Digital Signal Processing
Year of Conference: 2007
Pages: 312-314
Publisher: IEEE
DOI: 10.1109/ICDSP.2007.4288581
Library holdings: Search Newcastle University Library for this item
ISBN: 9781424408818