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Responsive fault-tolerant computing in the era of terascale integration - State of art report

Lookup NU author(s): Dr Paul EzhilchelvanORCiD

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Abstract

Scaling in hardware integration process results in IC-process geometry reductions, lower operating voltages and increased clock speeds. This paper first surveys the reliability obstacles these developments give rise to and then points out that computing systems can no longer be safely assumed to fail only by crashing. Yet this assumption is at the core of primary-backup replication which the literature presents as the appropriate, and hence the most widely used, strategy for time-critical fault-tolerant applications. The paper then observes that building computing nodes with announced crash failure mode is a promising way forward to deal with the emerging reliability challenges. Work carried out to assure such a failure mode has also been briefly surveyed. © 2008 IEEE.

Publication metadata

Author(s): Ezhilchelvan P

Publication type: Conference Proceedings (inc. Abstract)

Publication status: Published

Conference Name: Proceedings - 11th IEEE Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, ISORC 2008

Year of Conference: 2008

Pages: 492-496

Date deposited: 01/06/2010

Publisher: Institute of Electrical and Electronics Engineers

URL: http://dx.doi.org/10.1109/ISORC.2008.42

DOI: 10.1109/ISORC.2008.42

Library holdings: Search Newcastle University Library for this item

ISBN: 9780769531328

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