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Logarithmic number system and floating-point arithmetic on FPGA

Lookup NU author(s): Dr Nick Coleman

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Abstract

An introduction to a logarithmic number system (LNS) is presented. The range and precision of this arithmetic are briefly discussed. We show that the LNS arithmetic is suitable for an FPGA implementation. A case study will compare parameters of the LNS arithmetic library to conventional floating-point arithmetic. (7 References).

Publication metadata

Author(s): Coleman N; Matousek R; Tichy M; Pohl Z; Kadlec J; Softley C

Editor(s): Glesner, M., Zipf, P., Renovell, M.

Publication type: Conference Proceedings (inc. Abstract)

Publication status: Published

Conference Name: 12th International Conference on Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream (FPL)

Year of Conference: 2002

Pages: 175-188

ISSN: 0302-9743 (print) 1611-3349 (online)

Publisher: Springer

URL: http://dx.doi.org/10.1007/3-540-46117-5_65

DOI: 10.1007/3-540-46117-5_65

Library holdings: Search Newcastle University Library for this item

Series Title: Lecture Notes in Computer Science

ISBN: 9783540441083

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