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Logarithmic number system and floating-point arithmetics on FPGA

Lookup NU author(s): Dr Nick Coleman

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Abstract

An introduction to a logarithmic number system (LNS) is presented. Range and precision of this arithmetic is briefly discussed. We show that the LNS arithmetic is suitable for a FPGA implementation. A case study will compare parameters of our LNS arithmetic library to a conventional floating-point arithmetic.


Publication metadata

Author(s): Matousek R, Tichy M, Pohl Z, Kadlec J, Softley C, Coleman N

Editor(s): Glesner, M., Zipf, P., Renovell, M.

Publication type: Conference Proceedings (inc. Abstract)

Publication status: Published

Conference Name: Field-Programmable Logic and Applications. Reconfigurable Computing Is Going Mainstream: 12th International Conference (FPL)

Year of Conference: 2002

Pages: 175-188

ISSN: 0302-9743 (print) 1611-3349 (online)

Publisher: Springer

URL: http://dx.doi.org/10.1007/3-540-46117-5_65

DOI: 10.1007/3-540-46117-5_65

Library holdings: Search Newcastle University Library for this item

Series Title: Lecture Notes in Computer Science

ISBN: 9783540441083


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