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Design and analysis of a low-swing driver scheme for long interconnects

Lookup NU author(s): Nor Mahyuddin, Dr Gordon Russell, Dr Graeme Chester


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Market forces are continually demanding devices with increased functionality/unit area; these demands have been satisfied through aggressive technology scaling which, unfortunately, has impacted adversely on the global interconnect delay subsequently reducing system performance. Line drivers have been used to mitigate the problems with delay; however, these have large power consumption. A solution to reducing the power dissipation of the drivers is to use lower supply voltages. However, by adopting a lower power supply voltage, the performance of the line drivers for global interconnects is impaired unless low-swing signalling techniques are implemented. The paper describes the design of a low-swing signalling scheme which consists of a low-swing driver, called the nLVSD driver which is an improved version of the MJ-driver [1] designed by Juan A. Montiel-Nelson and Jose C. Garcia. Subsequently, both low-swing driver schemes are analysed and compared focusing on their power consumption and performance characteristics, which are the main issues in present day IC design. A comparison between the two driver schemes showed that the nLVSD driver exhibited a 34% improvement regarding power consumption and a 28% improvement in delay when driving a 10 mm length of interconnect. A comparison between the two schemes was also undertaken in the presence of +/- 3 sigma Process and Voltage (PV) variations. The analysis indicated that the nLVSD driver scheme was more robust than the MJ-driver with a 33% and 44% improvement with respect to power consumption and delay variations. In order to further improve the robustness of the nLVSD scheme against process variation, the scheme was further analysed to identify which process variables had the most impact on circuit delay and power consumption. For completeness the effects of process variation on interconnect delay and power consumption was also undertaken. (C) 2011 Elsevier Ltd. All rights reserved.

Publication metadata

Author(s): Mahyuddin NM, Russell G, Chester EG

Publication type: Article

Publication status: Published

Journal: Microelectronics Journal

Year: 2011

Volume: 42

Issue: 9

Pages: 1039-1048

Print publication date: 22/07/2011

ISSN (print): 0026-2692

ISSN (electronic):

Publisher: Elsevier Ltd


DOI: 10.1016/j.mejo.2011.06.014


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