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Elastic Bundles: Modelling and Synthesis of Asynchronous Circuits with Granular Rigidity

Lookup NU author(s): Johnson Fernandes, Dr Danil Sokolov, Professor Alex Yakovlev



This is the authors' accepted manuscript of a conference proceedings (inc. abstract) that has been published in its final definitive form by IEEE, 2017.

For re-use rights please refer to the publisher's terms and conditions.


Elastic circuit design is a revolutionary step in VLSI design paving the way for commercial adoption of asynchronous design techniques. With a growing trend of synchronous-asynchronous CAD tool flow integration, this paradigm shows promise to survive market forces of the semiconductor industry mainly due to scope for reuse of synchronous functional blocks and IP cores, and co-existence of synchronous and asynchronous design styles in a common EDA framework. In this paper, we introduce 'Elastic Bundles', a novel class of elastic circuits, and propose a method for modelling, designing and synthesising these circuits. Starting with a high-level dataflow model of a system, which is natively asynchronous, the key idea is to introduce rigidity of chosen granularity levels without changing functional behaviour. The resulting model is then partitioned into functional blocks of fine-grained and coarse-grained asynchronous elements that would finally be transformed to equivalent circuit descriptions for system logic synthesis using standard EDA tools. The methodology is illustrated using a case study of a 16-point FFT circuit design, which clearly demonstrates a spectrum of solutions that can be achieved in different levels of bundling granularity.

Publication metadata

Author(s): Fernandes J, Sokolov D, Yakovlev A

Publication type: Conference Proceedings (inc. Abstract)

Publication status: Published

Conference Name: 23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)

Year of Conference: 2017

Pages: 57-64

Online publication date: 07/11/2017

Acceptance date: 13/02/2017

Date deposited: 08/12/2017

ISSN: 9781538627495

Publisher: IEEE


DOI: 10.1109/ASYNC.2017.14