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Reconfigurable asynchronous pipelines: From formal models to silicon

Lookup NU author(s): Dr Danil Sokolov, Alessandro De Gennaro, Dr Andrey Mokhov



This is the authors' accepted manuscript of a conference proceedings (inc. abstract) that has been published in its final definitive form by IEEE, 2018.

For re-use rights please refer to the publisher's terms and conditions.


© 2018 EDAA. Dataflow pipelines are widely used in the design of high-throughput computation systems. Real-life applications often require dynamically reconfigurable pipelines to differently process data items or adjust to the current operating mode. Reconfigurable synchronous pipelines are known since 1980s and are well supported by formal models and tools. Reconfigurable asynchronous pipelines on the other hand, have neither a formal behavioural model, nor mature EDA support, making them unattractive to industry. This paper presents a model and an open-source tool for the design and verification of reconfigurable asynchronous pipelines, and validates this approach in silicon.

Publication metadata

Author(s): Sokolov D, De Gennaro A, Mokhov A

Publication type: Conference Proceedings (inc. Abstract)

Publication status: Published

Conference Name: Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition (DATE 2018)

Year of Conference: 2018

Pages: 1562-1567

Online publication date: 23/04/2018

Acceptance date: 02/04/2016

Date deposited: 01/12/2017

ISSN: 1558-1101

Publisher: IEEE


DOI: 10.23919/DATE.2018.8342264

Library holdings: Search Newcastle University Library for this item

ISBN: 9783981926309