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Surface roughness and interface engineering for gate dielectrics on strained layers

Lookup NU author(s): Dr Sanatan Chattopadhyay


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The change in the morphology of various gate dielectrics (including deposited ZrO2 and TiO2) on strained-Si on relaxed SiGe/Si and strained-SiGe layers is studied using an atomic force microscope (AFM). The AFM observation was carried out before and after oxidation. It has been found that the oxidation rate of strained-Si was affected by the existence of the cross-hatch related surface morphology. As a result, the surface roughness increases after oxidation. The roughness increase is more pronounced in a 26% Ge-content samples than in a 9% Ge-content sample. Transmission electron microscopy (TEM) has been used to identify the structure of the deposited layers and their interface with the strained-Si or SiGe substrates. Structural and electrical characterization results for deposited high-k gate dielectrics on strained-Si using Al/ZrO2/n-Si and Al/TiO2/n-Si metal-insulator-semiconductor (MIS) structures with equivalent oxide thickness (EOT) of 2.5 nm are presented. Effects of nitrogen incorporation on the electrical, interfacial, charge trapping and reliability properties of ultrathin oxide/oxynitride films grown using rapid thermal oxidation on strained-SiGe substrates are also discussed. © Springer Science+Business Media, LLC 2006.

Publication metadata

Author(s): Maiti CK, Samanta SK, Bera MK, Chattopadhyay S

Publication type: Article

Publication status: Published

Journal: Journal of Materials Science: Materials in Electronics

Year: 2006

Volume: 17

Issue: 9

Pages: 711-722

Print publication date: 01/09/2006

ISSN (print): 0957-4522

ISSN (electronic): 1573-482X

Publisher: Springer


DOI: 10.1007/s10854-006-0023-2


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