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Analysis of self-heating effects in ultrathin-body SOI MOSFETs by device simulation

Lookup NU author(s): Professor Anthony O'Neill

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Abstract

This paper discusses self-heating (SHE) effects in silicon-on-insulator (SOI) CMOS technology and applies device simulation to analyze the impact of thermal effects on the operation of nanoscale SOI n-MOSFETs. A 2-D drift-diffusion electrothermal simulation, using an electron transport model calibrated against Monte Carlo simulations at various temperatures, is employed in the analysis. We report the effects of device-structure parameters, such as SOI layer thickness, buried-oxide (BOX) thickness, source/drain (S/D) extension length, and thickness of the elevated S/D region, on the SHE of nanoscale MOSFETs. The SHE effects become significant due to the adoption of thin silicon layers and to the low thermal conductivity of the BOX, leading to the rise of large temperature under nominal operation conditions for high-performance digital circuits. The ac performance of SOI MOSFETs is influenced as well, and in particular, a severe degradation of the cutoff frequency of very short MOSFETs is predicted by numerical electrothermal device simulations. Although the effects of SHE on device performance are found to be somewhat modest and might be mitigated through device design, they may result in a degradation of the long-term reliability.


Publication metadata

Author(s): Fiegna C, Yang Y, Sangiorgi E, O'Neill AG

Publication type: Article

Publication status: Published

Journal: IEEE Transactions on Electron Devices

Year: 2008

Volume: 55

Issue: 1

Pages: 233-244

ISSN (print): 0018-9383

ISSN (electronic): 1557-9646

Publisher: IEEE

URL: http://dx.doi.org/10.1109/TED.2007.911354

DOI: 10.1109/TED.2007.911354


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