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Silicon Carbide Vertical JFET with Self-Aligned Nickel Silicide Contacts

Lookup NU author(s): Dr Konstantin VasilevskiyORCiD, Irina Nikitina, Dr Alton Horsfall, Professor Nick Wright


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Trenched implanted vertical JI.ETs (TI-VJFETs) with self-aligned gate and source contacts were fabricated on commercial 4H-SiC epitaxial wafers. Gate regions were formed by aluminium implantation through the same silicon oxide mask which was used for etching mesa-structures. Self-aligned nickel silicide source and gate contacts were formed using a silicon oxide spacer formed on mesa-structure sidewalls by anisotropic thermal oxidation of silicon carbide followed by anisotropic reactive ion etching of oxide. Fabricated normally-on 4H-SiC TI-VJFETs demonstrated low gate leakage currents and blocking voltages exceeding 200 V.

Publication metadata

Author(s): Vassilevski K, Nikitina I, Horsfall AB, Wright NG, Smith AJ, Johnson CM

Editor(s): Monakhov, E.V., Hornos, T., Svensson, B.G.

Publication type: Conference Proceedings (inc. Abstract)

Publication status: Published

Conference Name: Materials Science Forum: 8th European Conference on Silicon Carbide and Related Materials

Year of Conference: 2011

Pages: 670-673

ISSN: 0255-5476 (print) 1422-6375 (online)

Publisher: Trans Tech Publications Ltd.


DOI: 10.4028/

Library holdings: Search Newcastle University Library for this item