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Strained Si/SiGe n-channel MOSFETs: Impact of cross-hatching on device performance

Lookup NU author(s): Dr Sarah Olsen, Professor Anthony O'Neill

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Abstract

The performance of surface channel MOSFET devices depends on the Si/SiO2 interface quality. The present study has examined the Si/SiO2 interface of strained Si n-channel MOSFETs fabricated on a Si/SiGe virtual substrate. Evidence of a variation in the oxidation rate of strained Si along the cross-hatch period is presented. The undulating oxide thickness was found to be accompanied by increased nanoscale roughness at the Si/SiO2 interface for the strained Si surface channel devices compared with conventional MOSFETs. Fluctuations in the strained Si surface channel thickness were additionally caused by the variation in oxidation rate. The control devices exhibited a tighter distribution of electrical characteristics than the strained Si devices due to the non-uniform cross-hatch severity across the Si/SiGe wafer. The results provide strong evidence that significantly enhanced performance of HNMOS surface channel devices is possible through optimization of epitaxial growth methods. Strain in the channel was maintained following device fabrication using a conventional process with a reduced thermal budget.

Publication metadata

Author(s): Olsen SH, O'Neill AG, Norris DJ, Cullis AG, Woods NJ, Zhang J, Fobelets K, Kemhadjian HA

Publication type: Article

Publication status: Published

Journal: Semiconductor Science and Technology

Year: 2002

Volume: 17

Issue: 7

Pages: 655-661

Print publication date: 01/07/2002

ISSN (print): 0268-1242

ISSN (electronic): 1361-6641

Publisher: Institute of Physics Publishing Ltd.

URL: http://dx.doi.org/10.1088/0268-1242/17/7/303

DOI: 10.1088/0268-1242/17/7/303

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