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Benefits of high-k dielectrics in 4H-SiC trench MOSFETs

Lookup NU author(s): Professor Nick Wright, Nipapan Poolamai, Dr Konstantin VasilevskiyORCiD, Dr Alton Horsfall, Dr Christopher Johnson

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Abstract

The use of high-k dielectrics in 4H-SiC devices has recently attracted interest from the point of view of investigating whether such materials offer enhanced channel conduction when incorporated into 4H-SiC MOSFETS. This study shows that there are benefits and disadvantages of high-k dielectrics beyond just possible enhancement of channel carrier mobility. It is shown that incorporation of high-k dielectrics causes the peak electric field in the forward blocking state to be inside the semiconductor as opposed to the gate oxide of a conventional device. It is also shown that high-k devices are limited by reasons of constraints on cell geometry optimisation to voltages about ∼3kV and that parasitic capacitances within the high-k device are more sensitive to cell layout than in conventional oxide devices.

Publication metadata

Author(s): Wright NG, Poolamai N, Vassilevski KV, Horsfall AB, Johnson CM

Publication type: Article

Publication status: Published

Journal: Materials Science Forum

Year: 2004

Volume: 457-460

Pages: 1433-1436

Print publication date: 01/01/2004

ISSN (print): 0255-5476

ISSN (electronic): 1422-6375

Publisher: Trans Tech Publications Ltd

URL: http://dx.doi.org/10.4028/www.scientific.net/MSF.457-460.1433

DOI: 10.4028/www.scientific.net/MSF.457-460.1433

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