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Effective edge termination design in SiCVJFET

Lookup NU author(s): Praneet Bhatnagar, Dr Alton Horsfall, Professor Nick Wright, Professor Anthony O'Neill, Dr Konstantin VasilevskiyORCiD, Dr Christopher Johnson


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The current work investigates the edge termination techniques required to realize SiC Vertical Junction Field Effect Transistor (VJFET). Simulation results obtained using Silvaco TCAD tools have shown that the periphery fingers with metal contacts on them provide a strong electric field. This results in strong leakage, currents in the device in off state at high blocking voltages. However with no source contacts on the dummy fingers the device exhibited much lower leakage currents at same blocking voltages due to the presence of less strong electrical field. The effect of Junction Termination Extension (JTE) for effective edge termination was also studied.

Publication metadata

Author(s): Bhatnagar P; Wright NG; Vassilevski KV; O'Neill AG; Horsfall AB; Johnson CM

Editor(s): Nipoti, R., Poggi, A., Scorzoni, A.

Publication type: Conference Proceedings (inc. Abstract)

Publication status: Published

Conference Name: Silicon Carbide and Related Materials: 5th European Conference on Silicon Carbide and Related Materials

Year of Conference: 2005

Pages: 877-880

ISSN: 0255-5476 (print) 1422-6375 (online)

Publisher: Trans Tech Publications Ltd.


DOI: 10.4028/

Library holdings: Search Newcastle University Library for this item

Series Title: Materials Science Forum

ISBN: 9780878499632