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Study of surface roughness and dislocation generation in strained Si layers grown on thin strain-relaxed buffers for high performance MOSFETs

Lookup NU author(s): Dr Enrique Escobedo-Cousin, Dr Sarah OlsenORCiD, Professor Steve BullORCiD, Professor Anthony O'Neill

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Abstract

In this work, the impact of high temperature annealing typical of CMOS processing on the surface morphology of thin SiGe SRBs is investigated for strained silicon layers above and below the critical thickness.

Publication metadata

Author(s): Escobedo-Cousin E, Olsen SH, Bull SJ, O'Neill AG, Coulson H, Claeys C, Loo R, Delhougne R, Caymax M

Publication type: Conference Proceedings (inc. Abstract)

Publication status: Published

Conference Name: Third International SiGe Technology and Device Meeting, ISTDM 2006 - Conference Digest

Year of Conference: 2006

Pages: 1-2

Publisher: IEEE Press

URL: http://dx.doi.org/10.1109/ISTDM.2006.246495

DOI: 10.1109/ISTDM.2006.246495

Library holdings: Search Newcastle University Library for this item

ISBN: 9781424404612

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