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Lookup NU author(s): Dr Kelvin Kwa,
Dr Sanatan Chattopadhyay,
Dr Sarah Olsen,
Professor Anthony O'Neill
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It is demonstrated from experimental I-V and C-V data, and confirmed by computer simulation, that strained Si/SiGe MOSFET performance severely degrades below a channel thickness of 7 nm. MOSFETs with strained Si channels of thickness 5 nm, 7 nm and 9 nm have been fabricated using a conventional high thermal budget process. The performance degradation is attributed to Ge diffusion through the strained Si layer, which causes a build lip of gate oxide charge.
Author(s): Kwa KSK, Chattopadhyay S, Olsen SH, Driscoll LS, O'Neill AG
Publication type: Conference Proceedings (inc. Abstract)
Publication status: Published
Conference Name: 33rd European Solid-State Device Research Conference (ESSDERC)
Year of Conference: 2003
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