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The Newcastle University research output collection, currently available on ePrints, will shortly be moving to a new open repository platform, Figshare. To prepare for the data migration we have paused adding new content to ePrints, and will resume once the new repository is launched. During this time you will continue to have access to ePrints (but no new content will appear). We will share updates here when available.

High-performance nMOSFETs using a novel strained Si/SiGe CMOS architecture

Lookup NU author(s): Dr Sarah OlsenORCiD, Professor Anthony O'Neill, Luke Driscoll, Dr Kelvin Kwa, Dr Sanatan Chattopadhyay, Dr David Robbins

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Abstract

Performance enhancements of up to 170% in drain current, maximum transconductance, and field-effect mobility are presented for nMOSFETs fabricated with strained-Si channels compared with identically processed bulk Si MOSFETs. A novel layer structure comprising Si/Si0.7Ge0.3 on an Si0.85Ge0.15 virtual substrate (VS) offers improved performance advantages and a strain-compensated structure. A high thermal budget process produces devices having excellent on/off-state drain-current characteristics, transconductance, and subthreshold characteristics. The virtual substrate does not require chemical-mechanical polishing and the same performance enhancement is achieved with and without a titanium salicide process.

Publication metadata

Author(s): Olsen SH, O'Neill AG, Driscoll LS, Kwa KSK, Chattopadhyay S, Waite AM, Tang YT, Evans AGR, Norris DJ, Cullis AG, Paul DJ, Robbins DJ

Publication type: Article

Publication status: Published

Journal: IEEE Transactions on Electron Devices

Year: 2003

Volume: 50

Issue: 9

Pages: 1961-1969

Print publication date: 01/09/2003

ISSN (print): 0018-9383

ISSN (electronic): 1557-9646

Publisher: IEEE

URL: http://dx.doi.org/10.1109/TED.2003.815603

DOI: 10.1109/TED.2003.815603

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